APPENDIX E
INTERFACES
This appendix consists of four distinct parts, related to the way in
which the Amiga talks to the outside world.
The first part specifies the pinouts of the externally accessible
connectors and the power available at each connector. It does not,
however, provide timing or loading information.
The second part briefly describes the functions of those pins whose
purpose may not be evident.
The third part contains a list of the connections for certain internal
connectors, notably the disk.
The fourth part specifies how various signals relate to the available
ports of the 8520. This information enables the programmer to relate the
port addresses to the outside-world items (or internal control signals)
that are to be affected.
- Appendix E 295 -
The third and fourth parts are primarily for the use of the systems
programmer and should generally not be utilized by applications
programmers.
Systems software normally is configured to handle the setting of
particular signals, no matter how the physical connections may change. In
other words, if you have a version of the system software that matches
the revision level of the machine (normally a true condition), when you
ask that a particular bit be set, you don't care which port that bit is
connected to. Thus, applications programmers should rely on system
documentation rather than going directly to the ports.
NOTE
In a multitasking operating system, many different tasks may be competing
for the use of the system resources. Applications programmers should
follow the established rules for resource access in order to assure
compatibility of their software with the system.
************** PART 1 - OUTSIDE WORLD CONNECTORS ********************
This ia a list of the connections to the outside world on the Amiga.
RS232 and MIDI Port
-------------------
A500/ CBM
PIN RS232 A1000 A2000 PCs HAYES DESCRIPTION
--------------------------------------------------------------
1 GND GND GND GND GND FRAME GROUND
2 TXD TXD TXD TXD TXD TRANSMIT DATA
3 RXD RXD RXD RXD RXD RECEIVE DATA
4 RTS RTS RTS RTS � REQUEST TO SEND
5 CTS CTS CTS CTS CTS CLEAR TO SEND
6 DSR DSR DSR DSR DSR DATA SET READY
7 GND GND GND GND GND SYSTEM GROUND
8 CD CD CD DCD DCD CARRIER DETECT
9 - - +12v +12v - +12 VOLT POWER
10 - - -12v -12v - -12 VOLT POWER
11 - - AUDO - - AUDIO OUTPUT
12 S.SD - - - SI SPEED INDICATE
13 S.CTS - - - -
14 S.TXD -5Vdc - - - -5 VOLT POWER
15 TXC AUDO - - - AUDIO OUT OF AMIGA
16 S.RXD AUDI - - - AUDIO IN TO AMIGA
17 RXC EB - - - BUFFERED PORT CLOCK 716kHz
18 - INT2* AUDI - - INTERRUPT LINE TO AMIGA
19 S.RTS - - - -
20 DTR DTR DTR DTR DTR DATA TERMINAL READY
21 SQD +5 - - - + 5 VOLT POWER
22 RI - RI RI RI RING INDICATOR
23 SS +12Vdc - - - +12 VOLT POWER
24 TXC1 C2* - - - 3.58 MHZ CLOCK
25 - RESB* - - - BUFFERED SYSTEM RESET
- 296 Appendix E -
PARALLEL (CENTRONICS) PORT
--------------------------
PIN 1000 500/2000 Commodore PC's
--- ---- -------- --------------
1 DRDY* STROBE* STROBE*
2 Data 0 Data 0 Data 0
3 Data 1 Data 1 Data 1
4 Data 2 Data 2 Data 2
5 Data 3 Data 3 Data 3
6 Data 4 Data 4 Data 4
7 Data 5 Data 5 Data 5
8 Data 6 Data 6 Data 6
9 Data 7 Data 7 Data 7
10 ACK* ACK* ACK*
11 BUSY (data) BUSY BUSY
12 POUT (clk) POUT POUT
13 SEL SEL SEL
14 GND +5v pullup AUTODXT
15 GND NC ERROR*
16 GND RESET* INIT*
17 GND GND SLCT IN*
18-22 GND GND GND
23 +5 GND GND
24 NC GND GND
25 Reset* GND GND
KEYBOARD ...RJ11
----------------
A1000 A2000
----- -----
1 +5 Volts KCLK
2 CLOCK KDAT
3 DATA NC
4 GND GND
5 - +5 Volts
Not Applicable to the A500.
Video ...DB3 MALE
-----------------
For A500, A1000, A2000 unless otherwise stated
1 XCLK* 13 GNDRTN (Return for XCLKEN*)
2 XCLKEN* 14 ZD*
3 RED 15 C1*
4 GREEN 16 GND
5 BLUE 17 GND
6 DI 18 GND
7 DB 19 GND
8 DG 20 GND
9 DR 21 A1000/2000 -5 VOLT POWER
10 CSYNC* A500 -12 VOLT POWER
11 HSYNC* 22 +12 VOLT POWER
12 VSYNC* 23 +5 VOLT POWER
- Appendix E 297 -
RF Monitor ...8 PIN DIN (J2) A1000 only
---------------------------------------
1 N.C.
2 GND
3 AUDIO LEFT
4 COMP VIDEO
5 GND
6 N.C.
7 +12 VOLT POWER
8 ADIO RIGHT
DISK EXTERNAL ...DB23 FEMALE
----------------------------
For A500, A1000, nd A2000 with A2000 differences noted.
1 RDY* 13 SIDEB*
2 DKRD* 14 WPRO*
3 GND 15 TK0*
4 GND 16 DKWEB*
5 GND 17 DKWDB*
6 GND 18 STEPB*
7 GND 19 DIRB
8 MTRXD* 20 SEL3B* A2000 not used (1)
9 SEL2B* A2000 SEL3B* (1) 21 SEL1B* A2000 SEL2B* (1)
10 DRESB* 22 INDEX*
11 CHNG* 23 +12
12 +5
(1) SEL1B* is not drive 1, but rather the first external drive. Not
all elect lines may be implemented.
- 298 Appendix E -
RAMEX . 60 PIN EDGE (156) (P1) A1000 only
----------------------------------------------
gnd A gnd
2 D15 B D14
3 +5 C +5
4 D12 D D13
5 gnd E gnd
6 D11 F D10
7 +5 H +5
8 D8 J D9
9 gnd K gnd
10 D7 L D6
11 +5 M +5
12 D4 N D5
13 gnd P gnd
14 D3 R D2
15 +5 S +5
16 D0 T D1
17 gnd U gnd
18 DRA4 V DRA3
19 DRA5 W DRA2
20 DRA6 X DRA1
21 DRA7 Y DRA0
22 gnd Z gnd
23 RAS* AA RRW*
24 gnd BB gnd
25 gnd CC gnd
26 CASU0* DD CASU1*
27 gnd EE gnd
28 CASL0* FF CASL1*
29 +5 HH +5
30 +5 JJ +5
- Appendix E 299 -
EXPANSION ...86 PIN EDGE (.1) (P2)
----------------------------------
PIN A500 A1000 A2000 A2000b FUNCTION
--- ---- ----- ----- ------ --------
1 x x x x ground
2 x x x x ground
3 x x x x ground
4 x x x x ground
5 x x x x +5VDC
6 x x x x +5VDC
7 x x x x No Connect
8 x x x x -5VDC
9 x x No Connect
x x 28MHz Clock
10 x x x x +12VDC
11 x x x No Connect
x /COPCFG (Configuration Out)
12 x x x x CONFIG IN, Grounded
13 x x x x Ground
14 x x x x /C3 Clock
15 x x x x CDAC Clock
16 x x x x /C1 Clock
17 x x x x /OVR
18 x x x x RDY
19 x x x x /INT2
20 x /PALOPE
x x No Connect
x /BOSS
21 x x x x A5
22 x x x x /INT6
23 x x x x A6
24 x x x x A4
25 x x x x ground
26 x x x x A3
27 x x x x A2
28 x x x x A7
29 x x x x A1
30 x x x x A8
31 x x x x FC0
32 x x x x A9
33 x x x x FC1
34 x x x x A10
35 x x x x FC2
36 x x x x A11
37 x x x x Ground
38 x x x x A12
39 x x x x A13
40 x x x x /IPL0
41 x x x x A14
42 x x x x /IPL1
43 x x x x A15
44 x x x x /IPL2
45 x x x x A16
46 x x x x BEER*
47 x x x x A17
48 x x x x /VPA
49 x x x x Ground
50 x x x x E Clock
- 300 Appendix E -
EXPANSION ...86 PIN EDGE (.1) (P2) (cont.)
------------------------------------------------------
PIN A500 A1000 A2000 A2000b FUNCTION
--- ---- ----- ----- ------ --------
51 x x x x /VMA
52 x x x x A18
53 x x x x RST
54 x x x x Al9
55 x x x x /HLT
56 x x x x A20
57 x x x x A22
58 x x x x A21
59 x x x x A23
60 x x x /BR
x /CBR
61 x x x x Ground
62 x x x x /BGACK
63 x x x x D15
64 x x x /BG
x /CBG
65 x x x x D14
66 x x x x /DTACK
67 x x x x D13
68 x x x x R/W
69 x x x x D12
70 x x x x /LDS
71 x x x x D11
72 x x x x /UDS
73 x x x x Ground
74 x x x x /AS
75 x x x x D0
76 x x x x D10
77 x x x x D1
78 x x x x D9
79 x x x x D2
80 x x x x D8
81 x x x x D3
82 x x x x D7
83 x x x x D4
84 x x x x D6
85 x x x x Ground
86 x x x x D5
JOYSTICKS ...DB9 male
---------------------
USAGE JOYSTICK MOUSE
----- -------- -----
1 FORWARD* (MOUSE V)
2 BACK* (MOUSE H)
3 T.FT* (MOUSE VQ)
4 RIGHT* (MOUSE HQ)
5 POT X (or button 3 ..............if used )
6 FIRE* (or button 1)
7 +5
8 GND
9 POT Y (or button 2 )
- Appendix E 301 -
************** PART 2 MORE OUTSIDE WORLD ********************
PARALLEL INTERFACE CONNECTOR SPECIFICATION
The� 25-pin D-type connector with pins (DB25P=male for the A1000,
female for A500/A2000 and IBM compatibles) at the rear of the
Amiga is nominally used to interface to parallel printers. In this
capacity, data flow from the Amiga to the printer. This interface
may be used for �input or bi-directional data transfers. The
implementation is similar to Centronics�, but the pin assignment and
drive characteristics vary significantly from that specification
(See Pin assignment). Signal names correspond to those used in the
other places in this appendix, when possible.
PARALLEL CONNECTOR PIN ASSIGNNENT (J8)
NAME DIR NOTES
---- --- -----
DRDY* O Output-data-ready signal to parallel device in
output mode, used in conjunction with ACK* (pin
10) for a two-line asynchronous handshake.
Functions as input data accepted from Amiga in
input mode (similar to ACK* in output mode). See
timing diagrams in the following section.
D0 I/O +
Dl I/O |
D2 I/O |
D3 I/O | D0-D7 comprise an eight-bit bidirectional bus
D4 I/O | �for communication with parallel devices,
D5 I/O | nominally, a printer.
D6 I/O |
D7 I/O +
ACK* I Output-data-acknowledge from parallel device in
output mode, used in conjunction with DRDY* (pin �
1) for a two-line asynchronous handshake.
Functions as input-data-ready from parallel device
in input mode similar to DRDY* in output mode).
See timing diagrams. The 8520 can be programmed to
conditionally generate a level 2 interrupt to the
68000 whenever the ACK* input goes active.
BUSY I/O This is a general purpose I/O pin also connected
to a serial data I/O pin (serial clock on pin 12).
Note: Nominally used to indicate printer buffer full.
POUT I/O This is a general purpose I/O pin to a serial
clock I/O pin (serial data on pin 11).
Note: Nominally used to indicate printer paper out.
SEL I/O This is a general purpose I/O pin.
Note: nominally a select output from the parallel
device to the Amiga. On the A500/A2000 also shared
with RS232 "ring indicator" signal.
RESET* O Amiga System reset
- 302 Appendix E -�
PARALLEL CONNECTOR INTERFACE TIMING, OUTPUT CYCLE
PA<7:0>_____ ____________________________________________ ____
PB<7:0>_____X____________________________________________X____
|<-- T1 --->| |
| |<--------- T2 -------->|
DRDY* _________________V V____________________________
Output data ready |________|
|<- T3 ->|
|<--- T4 ---->|
ACK* ________________________________|<- T5 -->|_____________
Output data acknowledge | |
Microseconds
Min Typ Max
--- --- ---
T1: 4.3 -x- 5.3 Output data setup to ready delay.
T2: nsp -x- upc Output data hold time.
T3: nsp 1.4 nsp Output data ready width.
T4: 0 -x- upc Ready to acknowledge delay.
TS: nsp -x- upc Acknowledge width.
nsp - not specified
upc - under program control
PARALLEL CONNECTOR INTERFACE TIMING, INPUT CYCLE
PA<7:0>_____ ____________________________________________ ____
PB<7:0>_____X____________________________________________X____
|<-- T1 --->|
| T2 -->|<------>|
DRDY* _________________V ______________|_____________
input data ready |________| |
|<- T3 ->| |
|<--- T4 ---->|
ACK* ________________________________|<- T5 -->|_____________
input data acknowledge | |
Microseconds
Min Typ Max
--- --- ---
T1: 0 -x- upc Input data setup time.
T2: nsp -x- upc Input data hold time.
T3: nsp -x- upc Input data ready width.
T4: upc -x- upc Input data ready to data
acknowledge delay.
TS: nsp 1.4 nsp Input data acknowledge width.
nsp=not specified
upc=under program control
- Appendix E 303 -
SERIAL INTERFACE CONNECTOR SPECIFICATION
Thia 25-pin D-type connector with sockets (DB255=female) is used to
interface to RS-232-C standard signals. Signal names correspond to
those used in other places in this appendix, when possible.
WARNING: Pin on the R5232 connector other than these standard ones
described below may be connected to power or other non-R5232 standard
signals. When making up RS232 cables, connect only those pins actually
used for particular application. Avoid generic 25-connector "straight-
thru" cables.
SERIAL INTERFACE CONNECTOR PIN ASSIGNMENT (J6)
R5-232-C
NAME DIR STD NOTES
---- --- --- -------------------------------
FGND y Frame ground -- do not tie to signal ground
TXD O y Tranamit data
RXD I y Receive data
RTS O y Request to send
CTS I y Clear to send
DSR I y Data set ready
GND y Signal ground -- do not tie to frame ground
CD I y Carrier detect
-5V n* 50 ma maximum *** WARNING -5V ***
AUDO O n* Audio output from left (channels 0, 3) port,
intended to send audio to the modem.
AUDI I n* Audio input to right (channels 1, 2) port,
intended to receive audio from the modem; this
input is mixed with the analog output of the
right (channels 1, 2). It ia not digitized or
uaed by the computer in any way.
DTR O y Data terminal ready.
RI I y Ring Indicator (A500/A2000 only) ahared with printer
"select" signal.
RESB* O n* Amiga system reset.
NOTES:
n*: See warning above
See part 1 of this appendix for pin numbers.
SERIAL INTERFACE CONNECTOR TIMING
Maximum operating frequency ia 19.2 KHz. Refer to EIA standard
R5-232-C for operating and installation specifications.
A rate of 31.25 KHz will be supported through the use of a MIDI adapter.
Modem control signals (CTS, RTS, DTR, DSR, CD) are completely under
software control. The modem control lines have no hardware affect
on and are completely asynchronous to TXD and RXD.
- 304 Appendix E -
SERIAL INTERFACE CONNECTOR ELECTRICAL CHARACTERISTICS
OUTPUTS MIN TYP MAX
------- --- --- ---
Vo(-): 13.2 -x- -2.5 V Negative output voltage range
Vo(+): 8.0 -x- 13.2 V Positive output voltage range
Io: -x- -x- 10.0 ma Output current
INPUTS MIN TYP MAX
------ --- --- ---
Vi(+): 3.0 -x- 25.0 V Positive input voltage range
Vi(-): 25.0 -x- 0.5 V Negative input voltage range
Vhy: -x- 1.0 -x- V Input hysteresis voltage
Ii: 0.3 -x- 10.0 ma Input current
Unconnected inputs are interpreted the same as positive input voltages.
GAME CONTROLLER INTERFACE CONNECTOR SPECIFICATION
The two 9-pin D-type connectors with pins (male) are used to
interface to four types of devices:
1. Mouse or trackball, 3 buttons max.
2. Digital joystick, 2 button max.
3. Proportional (pot or proportional joystick), 2 buttons max.
4. Light pen, including pen-pressed-to-screen button.
The connector pin allignment are discussed in sections organized
by similar hardware and/or software operating requirements as shown
in the previous list. Signal names follow those used elsewhere
in this appendix, when possible.
J11 is the right controller port connector (JOY1DAT, POT1DAT).
J12 is the left controller port connector (JOY0DAT, POT0DAT).
NOTE: While most of the hardware discuased below is directly
accessible, hardware should be accessed through ROM kernel software.
This will keep future hardware changes transparent to the user.
- Appendix E 305 -
GAME CONTROLLER INTERFACE TO MOUSE/TRACKBALL QUADRATURE INPUTS
A mouse or trackball is a device that translates planar motion into
pulse trains. Quadrature techniques are employed to preserve the
direction as well as magnitude of displacement. The registers JOY0DAT
and JOY1DAT become counter registers, with y diaplacement in the high
byte and x in the low byte. Movement causes the following action:
Up: y decrements
Down: y increments
Right: x increments
Left: x decrements
To determine displacement, JOYxDAT is read twice with corresponding x
and y values subtracted (careful, modulo 128 arithmetic). Note that
if either count changes by more than 127, both distance and direction
become ambiguous. There is a relationship between the sampling
interval and the maximum speed (that is, change in distance) that
can be resolved as follows:
Velocity < Distance(max) / SampleTime
Velocity < SQRT(DeltaX**2 + DeltaY**2) / SampleTime
For an Amiga with a 200 count-per-inch mouse sampling during each
vertical blanking interval, the maximum velocity in either the X or Y
direction becomes:
Velocity < (128 Counts * 1 inch/200 Counts) / .017 sec = 38 in/sec
which should be sufficient for most users.
NOTE: The Amiga software is designed to do mouse update cycles during
vertical blanking. The horizontal and vertical counters are always
valid and may be read at any time.
CONNECTOR PIN USAGE FOR MOUSE/TRACKBALL QUADRATURE INPUTS
PIN MNEMONIC DESCRIPTION HARDWARE REGISTER/NOTES
--- -------- ----------- -----------------------
1 V Vertical pulses JOY[0/1]DAT<15:8>
2 H Horizontal pulses JOY[0/1]DAT(7:0>
3 VQ Vertical quadrature pulses JOY[0/1]DAT<15:8>
4 HQ Horizontal quadrature pulses JOY[0/1]DAT<7:0>
5 UBUT* Unused mouse button See Proportional Inputs.
6 LBUT* Left mouse button See Fire Button.
7 +5V +5V, current limited
8 Ground
9 RBUT* Right mouse button See Proportional Inputs.
- 306 Appendix E -
GAME PORT INTERFACE TO DIGITAL JOYSTICRS
A joystick is a device with four normally opened switches arranged 90
degree apart. The JOY[0/1]DAT registers become encoded switch input
port ao follow:
Forward: bit9 xor bit#8
Left: bit9
Back: bit1 xor bit0
Right: bit1
Data is encoded to facilitate the mouse/trackball operating mode.
NOTE: The right and left direction inputs are also designed to be
right and left buttons, respectively, for use with proportional
input. In this case, the forward and back inputs are not used,
while right and left become button inputs rather than joystick inputs.
The JOY[0/1]DAT registers are always valid and may be read at any time.
CONNECTOR PIN USAGE FOR DIGITAL JOYSTICK INPUTS
PIN MNEMONIC DESCRIPTION HARDWARE REGISTER/NOTES
--- -------- ----------- -----------------------
1 FORWARD* Forward joystick switch JOY[0/1]DAT<9 xor 8>
2 BACK* Back joystick switch JOY[0/1]DAT(1 xor 0>
3 LEFT* Left joystick switch JOY[0/1]DAT<9>
4 RIGHT* Right joystick switch JOY[0/1]DAT<1>
5 Unused
6 FIRE* Left mouse button See Fire Button.
7 +5V 125ma max, 200ma surge Total both ports.
8 Ground
9 Unused
GAME PORT INTERFACE TO FIRE BUTTONS
The fire button are normally opened switches routed to the 8520
adapter PRA0 a follow:
PRA0 bit 7 - Fire* left controller port
PRA0 bit 6 - Fire* right controller port
Before reading this register, the corresponding bits of the data
direction register mut be cleared to define input mode:
DDRA0<7:6> cleared as appropriate
NOTE: Do not disturb the settings of other bits in DDRA0 (Use of ROM
kernel call is recommended).
Fire buttons are always valid and may be read at any time.
- Appendix E 307 -
CONNECTOR PIN USAGE FOR FIRE BUTTON INPUTS
PIN MNEMONIC DESCRIPTION
--- -------- -----------
1 -x-
2 -x-
3 -x-
4 -x-
5 -x-
6 FIRE* Left mouse button/fire button
7 -x-
8 ground
9 -x-
GAME PORT INTERFACE TO PROPORTIONAL CONTROLLERS
Resistive (potentiometer) element linear taper proportional
controllers are supported up to 528k Ohms max (470k +/- 10%
recommended). The JOY[0/1]DAT registers contain digital
translation values for y in the high byte and x in the low byte.
A higher count value indicates a higher external resistance.
The Amiga performs an integrating analog-to-digital conversion
a follows:
1. For the first 7 (NTSC) or 8 (PAL) horizontal display lines,
the analog input capacitors are discharged and the positions
counters reflected in the POT[0/1]DAT registers are held reset.
For the remainder of the display field, the input capacitors are
allowed to recharge through the resistive element in the external
control device.
2. The gradually increasing voltage is continuously compared to
an internal reference level while counter keeps track of the
number of lines since the end of the reset interval.
3. When the input voltage finally exceeds the internal threshold
for a given input channel, the current counter value is latched
into the POT[0/1]DAT register corresponding to that channel.
4. During the vertical blanking interval, the software examines
the resulting POT[0/1]DAT register values and interprets the
counts in terms of joystick position.
NOTE: The POTY and POTX inputs are designated as "right mouse button" and
"unused mouse button" respectively. An opened switch corresponds to high
resitance, a closed switch to a low resistance. The buttons are also
available in POTGO and POTINP registers. It is recommended that
ROM kernel calls be used for future hardware compatibility.
It is important to realize that the proportional controller is more of a
"pointing" device than an absolute position input. It is up to the
software to provide the calibration, range limiting and averaging functions
needed to support the application's control requirements.
The POT[0/1]DAT register are typically read during video blanking,
but MAY be available prior to that.
- 308 Appendix E -
CONNECTOR PIN USAGE FOR PROPORTIONAL INPUTS
PIN MNEMONIC DESCRIPTION HARDWARE REGISTER/NOTES
--- -------- ----------- -----------------------
1 XBUT Extra Button
2 Unused
3 LBUT* Left button See Digital Joystick
4 RBUT* Right button See Digital Joystick
5 POTX X analog in POT[0/1]DAT<7:0>, POTGO, POTINP
6 Unused
7 +5V 125ma max, 200 ma surge
8 Ground
9 POTY Y analog in POT[0,1]DAT<15:8>, POTGO, POTINP
GAME PORT INTERFACE TO LIGHT PEN
A light pen is an optoelectronic device whose light-sensitive portion
is placed in proximity to a CRT. As the electron beam sweeps past the
light pen, a trigger pulse is generated which can be enabled to latch the
horizontal and vertical beam poitions. There is no hardware bit to
indicate this trigger, but this can be determined in the two ways
a shown in chapter 8, "Interface Hardware."
Light pen position is usally read during blanking, but MAY be available
prior to that.
CONNECTOR PIN USAGE FOR LIGHT PEN INPUTS
PIN MNEMONIC DESCRIPTION HARDWARE REGISTER/NOTES
--- -------- ----------- -----------------------
1 Unused
2 Unused
3 Unused
4 Unused
5 LPENPR* Light pen pressed See Proportional Inputs
6 LPENTG* Light pen trigger VPOSR, VHPOSR
7 +5V 125ma max, 200 ma surge Both ports
8 Ground
9 Unused
Note: depending on the maker, the light pen input may be either.
- Appendix E 309 -
EXTERNAL DISK INTERFACE CONNECTOR SPECIFICATION
The 23-pin D-type connector with sockets (DB23S) at the rear of the
Amiga is nominally used to interface to MFM devices.
EXTERNAL DISK CONNECTOR PIN ASSIGNMENT (J7)
PIN NAME DIR NOTES
--- ---- --- -----
1 RDY* I/O If motor on, indicates disk installed and up to
speed. If motor not on, identification mode. See
below.
2 DKRD* I MFM input data to Amiga.
3 GND
4 GND
5 GND
6 GND
7 GND
8 MTRXD* OC Motor on data, clocked into drive'a motor-on flip-flop by
the active transition of SELxB*.
Guaranteed setup time is 1.4 usec.
Guaranteed hold time ia 1.4 usec.
9 SEL2B* OC Select drive 2.*
10 DRESB* OC Amiga system reset. Drives should reset their
motor-on flip-flops and set their write-protect
flip-flops.
11 CHNG* I/O Note: Nominally used as an open collector input.
Drive's change flop is set at power up or when no
disk is not installed. Flop is reset when drive is
selected and the head stepped, but only if a disk
is intalled.
12 +5V 270 ma maximum; 410 ma surge
When below 3.75V, drives are required to reset their
motor-on flopa, and set their write-protect flops.
13 SIDEB* O Side 1 if active, side 0 if inactive
14 WPRO* I/O Asserted by selected, write-protected disk.
15 TK0* I/O Asserted by selected drive when read/write head
is positioned over track 0.
16 DKWEB* OC Write gate (enable) to drive.
17 DKWDB* OC MFM output data from Amiga.
18 STEPB* OC Selected drive steps one cylinder in the direction
indicated by DIRB.
19 DIRB OC Direction to step the head. Inactive to step
towards center of disk (higher-numbered tracks).
20 SEL3B* OC Select drive 3. *
21 SEL1B* OC Select drive 1. *
22 INDEX* I/O Index is a pulse generated once per disk revolution,
between the end and beginning of cylinders. The
8520 can be programmed to conditionally generate a
level 6 interrupt to the 68000 whenever the INDEX*
input goes active.
23 +12V 160 ma maximum; 540 ma surge.
* Note: the drive select lines are shifted as they pass through
a string of daisy chained devices. Thus the signal that appears
drive 2 select at the first drive shows up as drive 1 select
at the second drive and ao on...
- Appendix E 310 -
EXTERNAL DISK CONNECTOR IDENTIFICATION MODE
An identification mode is provided for reading a 32-bit serial
identification data stream from an external device. To initialize
this mode, the motor must be turned on, then off. See pin 8,
MTRXD* for a discussion of how to turn the motor on and off. The
transition from motor on to motor off reinitializes the serial
shift register.
After initialization, the SELxB* signal should be left in the
inactive state.
Now enter a loop where SELxB* is driven active, read serial input
data on RDY* (pin 1), and drive SELxB* inactive. Repeat this loop
a total of 32 times to read in 32 bits of data. The most significant
bit is received first.
EXTERNAL DISK CONNECTOR DEFINED IDENTIFICATIONS
$0000 0000 - no drive present.
$FFFF FFFF - Amiga standard 3.25 diskette.
$5555 5555 - 48 TPI double-denaity, double-sided.
As with other peripheral ID's, users should contact Commodore-Amiga
for ID assignment.
The serial input data is active low and must therefore be inverted
to be consistent with the above table.
EXTERNAL DISK CONNECTOR LIMITATIONS
1. The total cable length, including daisy chaining, muat not exceed
1 meter.
2. A maximum of 3 external devices may reside on this interface,
but specific implementations may support fewer external devices.
3. Each device must provide a 1000-0hm pull-up resistor on those
outputs driven by an open-collector device on the Amiga
(pin 8-10, 16-21).
4. The system provides power for only the first external device in the
daisy chains.
- Appendix E 311 -
************** PART 3 - INTERNAL CONNECTORS *******************
DISK INTERNAL ...34 PIN RIBBON (J10)
------------------------------------
1 GND 18 DIRB
2 CHNG* 19 GND
3 GND 20 STEPB*
4 MTROD* led) 21 GND
5 GND 22 DKWDB*
6 N.C. 23 GND
7 GND 24 DKWEB*
8 IND B * 25 GND
9 GND 26 TK0*
10 SELOB* 27 GND
11 GND 28 WPRO*
12 N.C. 29 GND
13 GND 30 DKRD*
14 N.C. 31 GND
15 GND 32 SIDEB*
16 MTROD* 33 GND
17 GND 34 RDY*
DISK INTERNAL POWER ...4 PIN STRAIGHT (J13)
-------------------------------------------
+12 (some drive are +5 only)
2 GND
3 GND
4 +5
- 312 Appendix E -
********** PART 4 - PORT SIGNAL ASSIGNMENTS FOR 8520 ************
Address BFFR01 data bits 7-0 (A12*) (int2)
------------------------------------------
PA7..game port 1, pin 6 (fire button*)
PA6..game port 0, pin 6 fire button*)
PA5..RDY* disk ready*
PA4..TK0* disk track 00*
PA3..WPRO* write protect*
PA2..CHNG* disk change*
PAl..LED* led light (0=bright) / audio filter control (A500 & A2000)
PA0..OVL ROM/RAM overlay bit
SP...KDAT keyboard data
CNT..KCLK keyboard clock
PB7..P7 data 7
PB6..P6 data 6
PB5..P5 data 5 Centronics parallel interface
PB4..P4 data 4 data
PB3..P3 data 3
PB2..P2 data 2
PBl..P1 data 1
PB0..P0 data 0
PC...drdy* Centronics control
F....ack*
Address BFDRFE data bits 15-8 (A13*) (int6)
PA7..com line DTR*, driven output
PA6..com line RTS*, driven output
PA5..com line carrier detect*
PA4..com line CTS*
PA3..com line DSR*
PA2..SEL Centronics control
PA1..POUT +--- paper out -------------+
PA0..BUSY | +--busy-----------------+ |
| | | |
SPBUSY | +- commodore serial bus-+ |
CNT..POUT + --commodore serial bus ---+
PB7..MTR* motor
PB6..SEL3* select external 3rd drive
PB5..SEL2* select external 2nd drive
PB4..SEL1* select external 1st drive
PB3..SEL0* select internal drive
PB2..SIDE* side select*
PB1..DIR direction
PB0..STEP* step*
PC...not used
F....INDEX* disk index pulse*
- Appendix E 313 -
PORT 0
__________________ POTOX
\ 5 o_/________________________
\ 9 o__/___________ |
\____________/ POTOY | |
\|/ \|/
______V_____________V______
| | |
| POT0Y | POT0Y | POT0DAT
| COUNTER | COUNTER | DFF012
|_____________|_____________|
PORT 1
__________________ POTOX
\ o_/________________________
\ o__/___________ |
\____________/ POTOY | |
\|/ \|/
______V_____________V______
| POT1Y | POT1X |
| COUNTER | COUNTER | POT1DAT
| LATCH | LATCH | DFF014
|_____________|_____________|
___________________________
| | | POTGO
|_________________________|_| DFF034
___________________________
| | POT1NP
|___________________________| DFF016
POT COUNTERS
- Appendix E 314 -
PORT 1 __________________ PORT 2 __________________
\ o o o o o / \ o o o o o /
\ o o o o / \ o o o o /
\__|_________/ \__|_________/
_________| |
|FIRE 0\ ______________________________________|
| | FIRE 1\
| |
| ___|___________________________________________________
| | FIRE | FIRE | | PRA
| | 1\ | 0\ | |$BFE001
| |______|______|______|______|______|______|______|______|
| 7 | 0
|______________|
_______________________________________________________
| | | |Data
| O | O | O O O O 1 1 |direc-
|______|______|______|______|______|______|______|______| tion
IN IN OUT OUT OUT OUT OUT OUT DDRA
$BFE201
READING FIRE BUTTONS
- Appendix E 315 -
____________________________________________
| | VPOSR read only
| | DFF004
|____________________________________________|
____________________________________________
| | VHPOSR read only
| | DFF006
|____________________________________________|
____________________________________________
| | | BPLCON0 write only
| | | DFF104
|__|__|__|__|__|__|__|__|__|__|__||_|__|__|__|
15 |3 0
|________Light Pen Enble
____________________________________________
| | POT1NP read only
| | DFF016 (Bit 8)
|__|__|__|__|__|__|__|__|__|__|__|__|__|__|__|
15 | 0
| PEN PRESS=POTOX
|___________________
|
_________________ |
\ o o o o o_/_____|
\ o o o o /
\_|_________/
|PORT 0
Light Pen _________|
________
|
\|/
V_____Latches V & H positions
LIGHT PEN
- Appendix E 316 -
End.
|