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Agnus Pin Assignment:
PIN # DESIGNATION FUNCTION DEFINITION
01-09 D8-D0 Data bus lines 8 to 0 I/O
10 VCC +5 Volt I
11 RES* System reset I
12 INT3* Interrupt level 3 O
13 DMAL DMA request line I
14 BLS* Blitter slowdown I
15 DBR* Data bus request O
16 ARW* Agnus RAM write O
17-24 RGA8-RGA1 Register address bus 8-1 I/O
25 CCK Color clock I
26 CCKQ Color clock delay I
27 VSS Ground I
28-36 DRA0-DRA8 DRAM address bus 0 to 8 O
37 LP* Light pen input I
38 VSY* Vertical sync I/O
39 CSY* Composite sync O
40 HSY* Horizontal sync I/O
41 VSS Ground I
42-48 D15-D9 Data bus lines 15 to 9 I/O
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